Video Segmentation System Based On FPGA

The main function of the video segmentation system is to enlarge a full-screenvideo signal, and then divide it in to multiple same resolution display device in apatchwork pattern. Recently, the video segmentation system, as an important part oflarge master control system, has been applied more and more widely, especially whenthe large master control system is commonly used.According to the features and parameters request of the design, the thesissuggested a video segmentation system design and implementation approach whichconsist of high-precision video capture chip, FGPA chip, DDR2memory andhigh-performance digital-to-analog conversion chip. This thesis consists of two parts:design of hardware circuit and design of digital logic.In hardware circuit design, the designer chose DDR2memory as external memory.DDR2memory lay the foundation for the further improvement of the system with itsadvantage on high speed and large storage capacity. In order to improve the PCB boardhigh-speed transmission quality, the design has made analysis of signal integrityproblem on hardware circuit, which is based on simulation of the chip’s IBIS model.According to the simulation, this design selected suitable structure topology andsuitable terminating resistor to obtain better results.FPGA chip is control centers and data processing centers of this design. In controlpart, the thesis has accomplished video capture chip configuration and control of theexternal DDR2memory with the rich resources of FPGA. This thesis suggested a videodata access method in external memory, and completed the design of read and writeaddresses. In data processing part, the thesis has implemented second-order Newtoninterpolation algorithm on FPGA chip. This algorithm can eliminate the edge blurphenomenon in certain degree and get better image quality than bilinear interpolation.