Based On The Fpga Dual Channel Video Acquisition And Preprocessing System Design

In recent years, the technology of digital image processing and real-time video information processing system which was widely used in target recognition and tracking machine vision、image of remote sensing、robotics、intelligent systems、medical image processing、military and civil fields, has been become an important technology to promote the progress of modern science.this thesis on the project background of a automatic route for fire control system, design and implement a low power、high performance and low cost、dual channel video processing platform based on visible light and infrared video, which was used to complete the target detection, recognition and tracking. According to the requirements and technical indicators of the fire control system for video processing platform, this thesis based on the design of DSP+FPGA、tower stacked structure composed of core circuit board and expansion circuit board, completed the system design and realization.According to the design scheme, the thesis selects YT-DM642as the core circuit board. The expansion circuit board based on FPGA-EP3C80as the core chip, completing the circuits design,including the video decoder TVP5150、video encoder SAA7105、external memory SRAM and series-parallel circuit design conversion chip TL16C752B. On this basis,the paper designs the core board DM642initialization, video ports acquisition and playback software, and realizes the expansion circuit board design of video decoder, video data acquisition and ping-pang cache and data communication with DSP based on FPGA. Among them, this paper designs a preprocessing module of image based on FPGA, effectively reduce the pretreatment time, simplify timing design, improve the real-time processing ability of the system.The thesis completed the dual channel video processing platform, realize the digital image preprocessing, video collection and playback, provides a reliable and high performance hardware development platform for the further implementation of the complex image processing algorithms. At present, the system platform is running well, achieves the expected design objective...