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Video Image Acquisition And Preprocessing System Design Based On FPGA

Posted on:2018-04-12Degree:MasterType:Thesis
Country:ChinaCandidate:Y T LiFull Text:PDF
GTID:2348330533965917Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
Because of the advantages of high-speed acquisition and real--time processing ,the image has very important application value in the fields of national defense and military, industrial control ,sofety control and control, the field programmable gate array(FPGA) is widely used in the field of video image acquisition and processing with high integation, flexible application,short design cycle and low development cost. FPGA parallel processing capapabilities and pipeline operations can significantly improve the speed to video image processing, so the system design based on FPGA has become the mainstream in the field of image acquisition and processing solutions.Firstly , the design scheme of video image acquisition and preprocssing system based on FPGA is determined .The system mainly consists of image acquisition and image pretreatment.In the image acquisition part, the CCD image sensor outputs the analog CVBS signal, converts the analog signal into digital signal through the video decoding chip ADV7181B, then decodes it into the CCIR656 YCbCr4: 2: 2 format data through the video decoding module, and then stores the data in two SDRAM in turn by using the ping-pang. In the image preprocessing section, the operation principle of Sobel edge detection algorithm and morphological filtering algorithm and the realization method of image edge detection and contour extraction are discussed in detail. YCbCr4: 2: 2 format data is coverted into RGB by color space conversion,and displayed via the VGA interface. The FPGA-based I2C configuration module, video decoding module, SDRAM control module, image preprocessing module, VGA display interface module hardware circuit design are all completed by using Verilog HDL.In the Modelsim, the modules were simulated and verified. Then, the system top-level design files of these modules were compileed by Altera's Quartus ?13.0 euvironment and downloaded to the development board. The results proved the feasibility and correctness of the design scheme.m To achieve the desired design purpose.
Keywords/Search Tags:Video image acquisition, Video image preprocessing, FPGA, Sobel edge detection
PDF Full Text Request
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