Design And Simulation Of Novel Tunneling FETs And Semi-Floating Gate Transistors

As the continuous scaling down of semiconductor device and the increasing density of transistors integrated into one chip, researches on novel nano-scale devices became more important than ever. Tunneling FET, as one of the most promising future device candidates with small subthreshold swing and low power consumption, has attracted much attention recently. In this paper, We mainly focused on two topics, one of which is the design and optimization of novel tunneling FET, and the other is novel semi-floating gate transistor.The first part of the paper mainly focused on using a u-shape channel and a SiGe heterojunction structure for TFET optimization. When compared to conventional MOSFET, TFET has a relatively low ON current. Therefore, the purpose of this part is to enhance the line tunneling current by using U-shape channel, thus improving the total drain current. Besides, silicon germanium, one of the narrow-band materials, is also used in the source region to shorten the tunneling distant and increase the tunneling current. At last, a highly doped n-type layer is inserted under the source region, further optimizing the ON state performance of TFET. As device dimension is scaled down, the degradation of TFET performance is also investigated by comparing UTFET and planar TFET with different gate length. Because u-shape channel will greatly increase the effective channel length, UTFET has a better scaling performance as compared to the planar one.The second part of the paper mainly focused on investigating the working principle of novel semi-floating gate (SFG) transistor and improving its scalability by using a u-shape channel structure. By integrated TFET into the MOS, a semi-floating gate transistor can achieve excellent read and write operations with small device area and low power consumption. As compared to conventional DRAM, the operation voltage can also be lowered. To improve the electrical performance when the device’s dimension is decreased to nano-scale, a u-shape channel (U-SFGT) could be used to replace the horizontal one. It will inhibit short channel effect effectively. TCAD simulation is used to analyze the working principle of the operation. And the devices with u-shape channel and horizontal channel are also compared under the different channel length. In this way, the merit of U-SFGT is elaborated. We also proposed two methods to optimize U-SFGT, one of which is inserting a highly doped layer to lower the hold "1" leakage current, and the other one is using local channel doping to adjust VT.All the work in this paper is based on TCAD simulation. We used a dynamic non-local band-to-band tunneling model, and the parameters in this model are calibrated.