A DRAM Test Chip Based On Semi-Floating Gate Transistor

As the narrowing of the device size and integrated circuit of the transistor density increasing,the dynamic random access memory(DRAM)storage capacitance size can not continue to shrink,the design and research of no capacitor memory is particularly important,the semi-floating gate transistor(SFGT)is considered to be the hope of capacitor-less memory due to its small area and low power consumption.This paper designs a DRAM test chip with semi-floating gate transistors as memory cells to explore whether SFGT can be applied to DRAM,so as to continue to reduce the size of dynamic memory,reduce power consumption,and improve data transmission speed.First,this article introduces the limitations of existing memory cell and the advantages of semi-floating gate transistors as dynamic memory cell,expounds the basic structure of semi-floating gate transistors,and analyzes the electrical characteristics of semi-floating gate transistors as dynamic memory cell.Secondly,based on the structural characteristics of the semi-floating gate transistor and dynamic storage requirements,four working states of erase,program,hold,and read are designed to realize the read and write functions.The four working states can be realized by different gate-source voltages.Finally,referring to the traditional DRAM circuit structure,the overall structure of the semi-floating gate memory test chip is proposed.The circuit is built by modules and verified with HSPICE simulation tools to realize the read and write functions of the memory.In the realization of the semi-floating gate memory circuit,in order to reduce the influence of parasitic parameters,the circuit is divided into four bank circuits and a global control circuit,and the global control circuit is responsible for coordinating the four bank circuits.The bank circuit adopts a block-type row and column decoding method,which includes three blocks: array,ytop,and xtop.The ytop and xtop circuits respectively control the working states of the bit lines and word lines to select memory cells in array.At the same time,the ytop circuits are also responsible for data writing and reading.In addition,according to the read characteristics of the semi-floating gate memory,this paper compares the four sense amplifier structures,and designs a latch-type voltage sense amplifier.Through Monte Carlo simulation,the sensitivity of different structures,sizes and reference voltages are obtained,and finally choose the double-sized series latch-type voltage sense amplifier as the final solution.Semi-floating gate memory provides a new idea for capacitor-less memory,filling the gap between volatile and non-volatile memory,and enabling the size of memory cells to continue to shrink.Moreover,compared to traditional DRAM,semi-floating gate memory reduces the refresh frequency,improves the read and write speed,and also reduces the cost.