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Design Of 1553B Bus Interface Card Based On FPGA

Posted on:2012-04-25Degree:MasterType:Thesis
Country:ChinaCandidate:D K WeiFull Text:PDF
GTID:2308330368978161Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
MIL-STD-1553B bus is the time-division command/response multiplex data bus system of aircraft interiors. Its standard is established and released by the US military in the 1970s, and became the standard data communication bus in the aircraft. The physical connection relations of 1553B bus is so simple that not more than 31 remote terminals can be hang on it by means of mode coupler. There are three types of terminals:BC, RT and BM. Generally, there is only one bus controller (BC) on 1553 bus. It can intercommunicates between BC and RT, RT and RT, as well broadcast and system control. It’s transmission medium is shielded twisted pair. The coupled modes of bus is consisted of direct coupling and transformer coupling.1553B bus is redundancy bus-control topological structure with the two-way transmission characteristics and the 1 Mps transmission speed. It adopts the Manchester code to transfer data by the half-duplex transmission mode.The design named 1553B bus interface card is based on the 1553B bus standard and GJB289A-97, use the BU-64863 protocol chip of America DDC company, adopted FPGA as the control chip. It could connect to the PC use the USB interface. The card achieved BC, RT, BM terminal type functions. The1553B multiplex transmission data bus replaced various kinds of the numerous and complicated bus communication systems into the most general standard used in the present military equipment aerospace internal unit communication. The simple topological structure of 1553B bus determines its operation nimble, and reduced weight effectively. For its all inherent advantages, the usage of 1553B bus was upgraded from the inchoate military bus standard to aeroplace use, even to the civillian use. The key features of 1553B are distributed processing, centralized control and real-time respone. It adopts dual redundant system with two transmission channels, even multichannel design in the mojority to ensure the fault-tolerate, error isolation and reliability in the data transmission process.
Keywords/Search Tags:1553B, FPGA, BU-64863, USB, redundancy
PDF Full Text Request
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