Based On Fpga-1553b Bus Interface Technology Research And Implementation

MIL-STD-1553B is a credible data bus with high transmission reliability.It especially used in the key computer module which realizes the communication between the real-time sensor and the control unit. It is widely ued in different military base system. With the demand of modern aviation electric,the importance of aviation communication is continuously enhanced.Now MIL-STD-1553B becomes the first choice of aviation bus,and becomes more and more important.The key to the 1553B bus system is to design 1553B data bus interface chip.However most of the 1553B protocol processor used in china are imported from foreign countries.In this view,developing 1553B protocol processor has significative meaning for the construction of national defence and the development of national economy.This paper puts forward a method of designing the interface based on FPGA after studying the MIL-STD-1553B protocol and the design of foreign chip product.According to the detailed function of the interface chip,this paper uses the Top-Down design method to put forward the total design scheme of 1553B bus interface.And then according to the function's implementing divide the structure of the design.This paper primary introduces the design of BC/RT/MT terminal,and then gives the design,simulation and testing of important modules,finaly make sure the universal interface by a select signal.This design uses hardware describe language VHDL to design,and synthesis by Xilinx's synthesis tools and finaly realize it in FPGA chip xc2v2000.At last,the author use the hardware testing circuit to test the system of bus interface chip and choose ADSP21161 as the primary CPU.The test contain the receiving and transmiting of the data by the cpu and the observe of the bus undee by the oscillogram.The result of validate indicates that the design in this paper is reasonable and right.