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Research And Design Of Even-number-stage High-performance Ring-VCOs

Posted on:2015-10-25Degree:MasterType:Thesis
Country:ChinaCandidate:J L FangFull Text:PDF
GTID:2298330467974572Subject:Integrated circuit engineering
Abstract/Summary:PDF Full Text Request
The stable periodic signals which are necessary for most communication systems are alwaysprovided by PLL (Phase Lock Loop) circuits. Meanwhile the VCO (Voltage Controlled Oscillator)is the core part of the PLL and always determines the performance of the circuits, so the study ofhigh-performance VCO is a hotpot in IC design. At present, there are two typical architectures ofVCOs: LC-VCO and Ring-VCO. The Ring-VCO can be made in stand CMOS process and easilyobtains wide tunning range and multi-phases clock outputs, so it has inapproachable advantages insome applications.The circuit structures of the Ring-VCO are complex and multiform. The differential structure isalways adopted to reduce the common-mode noise. At first, this thesis produces the theory ofoscillation and the modules of phase noise. In addition, some traditional structures are listed andtwo new circuits proposed. The first one was optimized by combining controlling the power of thecross-coupled MOS with modifying load resistance value. This can improve the linearcharacteristics of the circuits compared with each other. Meanwhile, the dual-delay paths techniquewas used to improve the frequence and a cross coupling positive feedback to reduce the transitiontime of outputs. The test results show that the first VCO has a output frequence range from1.57to2.76GHz and the phase noise is-91.11dBc/Hz at1MHz offset from the center frequence of2.2GHz.The second one used the inductive shunt peaking technology to expand the bandwidth of thedelay cell and the circuit oscillated at a high frequence. A pair of PMOS with the gates connected tothe ground were added to improve the linear frequency-voltage characteristic of the VCO. The testresults show that the second one has a output frequence range from3.25to4.2GHz and the phasenoise is-91.6dBc/Hz at1MHz offset from the center frequence of3.7GHz.
Keywords/Search Tags:Ring-VCO, Phase Noise, Dual-delay Paths, Bandwidth Expanding Technology, CMOS
PDF Full Text Request
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