Study On Noise Theory And Optimization Technology In CMOS Oscillator

In wireless communications, the frequency spectrum is a valuable commodity as the ever increasing number of wireless users demands more efficient usage of the already scarce frequency resources. Communication transceivers rely heavily on frequency conversion using local oscillators (LOs) and therefore the spectral purity of the oscillators in both the receiver and the transmitter is one of the factors limiting the maximum number of available channels and users. For that reason, a deeper understanding of the fundamental issues limiting the performance of oscillators, and development of desing guidelines to improve them, are necessary.Based on the domestic and foreign study state in CMOS oscillator, noise theory and optimization technology in CMOS oscillator is studied. High-frequency noise modeling in submicron MOSFET, phase noise modeling in CMOS oscillator, noise optimization technology, and CMOS oscillator circuit are studied to be suitable for high-frequency IC design. These studies are included as following aspects in detail.Study on high-frequency noise modeling in submicron MOSFET. Firstly, the effect on device noise by short-channle effects of deep submicron MOSFETs, such as mobility degradation, hot carrier, bulk change and channel length modulation effect are considered, and the models of short-channel effect, especially the model of hot carrier effect, are introduced into the modeling process of MOSFET channel thermal noise to improve the precision of the modeling. Secondly, the algebraic analytical model which include device design and model parameters and not include calculous is proposed to improve simplify for RF IC designer. Thirdly, the high-frquency noise modeling which include three kinds of noise source: channel thermal noise, induced gate noise and gate resistance noise is proposed, and can analyze roundly noise in submicron MOSFET. By measurement, channel thermal noise is main noise source in submicron MOSFET.Study on phase noise modeling in CMOS oscillator. Linear time invariant (LTI), linear time variant (LTV) and nolinear analysis are three kinds of methods for study on phase noise theory in oscillator. For LTV analysis can predict well phase noise of oscillator in precision and simplify, the method is selected as modeling phase noise in CMOS oscillator. Then, channel thermal noise model in submicron MOSFET is introduced into modeling process of phase noise to improve well precision. By simplifying in reason impulse sensitive function (ISF), phase noise modelings in CMOS oscillator are suitable for CMOS oscillator designer.Study on noise optimization technology in CMOS oscillator. Basically, in CMOS oscillator, the noise in resistance and MOSFET is main reason, and modulated to translate phase noise. So, device noise modeling in resistance and submicron MOSFET and phase noise modeling in CMOS oscillator are selected as analyzing underlying physical mechanisms of oscillator, and the optimization methods for oscillators are proposed to improve noise performance in CMOS oscillator.Study on CMOS oscillator circuit. Based on noise theory in submicron, phase noise theory in CMOS oscillator, and noise optimization technology in CMOS oscillator, a low phase noise ring oscillator is proposed by changing oscillator ciruit and device type of MOSFET.The thesis studies not only the high frequency device noise, but also the low frequency device noise (1/f noise) effect on CMOS oscillators by experiential modeling and analyzing quantificationally of flicker noise.