Design And Implementation Of A High-speed Turbo Product Code Decoder

As a low-complexity and high-efficiency forward error correcting code, Turbo productcode (Turbo Product Code, TPC) can improve the reliability of data transmission greatly indigital communication system. After the traditional iterative decoding algorithm isproposed, TPC has caused the extensive concern of researchers all the world. However,most of the current TPC decoders support only a small number of kinds of codingmodulation and their decoding latency is often large, so they are not suitable for thesedelay-sensitive applications. In order to solve these problem above, this paper designs andimplements a universal and high-speed decoder for Turbo product code.In this paper, we firstly study the coding and decoding principles of TPC deeply andanalyze the advantages and disadvantages of the existing research results. On the basis ofthe syndrome-based decoding algorithm, an improved decoding algorithm for TPC isproposed, which has low complexity and latency. On one hand, the improved algorithmfurther reduces the computational complexity and the decoding latency by simplifying thecalculation of syndrome and selecting a proper number of least reliable bits. On the otherhand, this algorithm obtains extra coding gain by using a stricter judgment condition.Matlab simulation result shows that, the improved algorithm has the similar decodingperformance to the traditional Chase-Pyndiah algorithm when bit error rate is less than106.Adopting the improved decoding algorithm and parallel pipelined technology, ahigh-speed TPC encoder and decoder is implemented on Xilinx FPGA platform. Moreover,we develop a user-friendly and visual bit error testing platform, which matches the encoderand decoder. With limited hardware logic resources (encoder:10%, decoder:68%), ourdecoding scheme can support eight kinds of coded modulation. The results of testdemonstrate that, the maximum data throughput of300Mbps is achieved with the operatingclock frequency of240MHz and the coding gains can fulfil the performance demands.