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Radiation Hardened Design For Image Signal Processing Circuit

Posted on:2015-03-06Degree:MasterType:Thesis
Country:ChinaCandidate:Y H YangFull Text:PDF
GTID:2298330452458985Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
CMOS image sensor (CIS) system on chip, as the main source of imageinformation collection unit, have a wide range of applications in the aerospace anddefense fields, so its radiation-tolerant ability is essential. Image signal processingcircuit is an important part of CIS system on chip, and we have to improve itsradiation hardened capability. The cost of SOI integrated circuit foundry is veryexpensive, and using the commercial technology to improve radiation-hardenedperformance of ICs through the design methods is becoming the hotspot in the field.In order to consume less hardware resources and achieve better processing andradiation-hardened ability, the design of radiation-tolerant image signal processingcircuit has become a major challenge.For the above, this paper analyzes the mechanism of ICs in the radiationenvironment, including total dose radiation and single-ion irradiation. For thedifferent types of irradiation, image signal processing circuit has been reinforceddesign and researched on transistor-level, unit-level and layout-level. According to thegeneral characteristics of current image sensor and image signal processor, the mainalgorithms of pipeline-structure image signal processing circuit, such as lens correction,color interpolation, auto-white balance, color space conversion, gamma correction and contrastadjustment, have been studied and implemented by Verilog HDL code. At the sametime, the function of Verilog Code has been verified. Finally, based on full customASIC library, the code of radiation-hardened image signal processing circuit has beensynthesized and the layout has been achieved.The size of the input Bayer format image is up to752×582, and the frame rate isup to30fps. The input data width is10bit, and the output data after processing is the16bit-width YCbYCrcompression format. The frequecy of the system clock is20MHz,and the power dissipation of the circuit is77.36mW, the area is1865671μm2and thearea of combinational logic circuits is1371012μm2after the design synthesis.Radiation-tolerant image signal processing circuit designed in the paper has certainimmunity not only to the single-ion irradiation, but also to the total doze radiation.Simultaneously,the circuit owns the better image processing.The image signal processing circuit designed in the patper can be integrated in radiation-hardened inCIS system on chip and provides the foundation for its development and research.
Keywords/Search Tags:Radiation Hardeness, Single-ion Radiation, total dose, Imagesignal processing
PDF Full Text Request
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