Design Of High-resolution Delta-Sigma ADC For Measurement

In general, ADC for measurement application is designed in the Delta-Sigmaarchitecture which combines noise shaping and oversampling technology because of itsvery high accuracy. Recently, Delta-Sigma architecture is widely used in high resolutionADC design. This paper presents a high resolution Delta-Sigma ADC with PGA andBand-gap on chip.The background of the subject is firstly introduced, and the composition andworking principle of Delta-Sigma ADC is explained in detail in this paper. Meanwhile,the impact of the non-ideal factors including finite DC gain of the operationalamplifier and capacitor mismatch, finite bandwidth and slew rate of op-amp, non-zeroresistance of sampling switch, system dead zone, idle tone, stable input range on systemperformance are discussed. Then according to the requirements the system level designincluding selection of Delta-Sigma modulator architecture, modulator order,oversampling rate, integrator gain and feed-forward coefficients is implemented. A threeorder, single loop, feed-forward, one-bit quantification, an over sampling rate of512Delta-Sigma modulator architecture is selected finally. Analog circuit part includingPGA, adder, integrator, comparator, DAC and reference circuit is implemented usingfully differential switched capacitor circuit. Digital circuit part including digitaldecimation filter, frequency divider, gain control circuit, overload detection circuit andthe calibration circuit, serial interface circuit is implemented using unsigned nμmber.System level verification of the corresponding non ideal factors is followed and theresults meet the design requirements. Finally, the circuit and layout is designed usingthe GF0.35μm CMOS process.The post simulation results show that, the noise floor is around-140dB, theharmonic is below-110dB in a19Hz signal bandwidth.The power dissipation is3.777477mW. The results meet the design requirements.