| In the field of modern digital signal processing, digital filter has been more and morewidely used.the two-channel filter, with its superior performance,is becoming one of thefocus of the application and research.At present, in synthetic aperture radar, video driver,audio drive, adaptive filtering and other relative scientific research domain,the dual-channelfilter has got very good application.however,digital filter in the traditional binary systemhas been diffcult to meet the requirements of real-time and high precision at the same timein the occasion of the flowing of ultra-high speed information,the reason is that,in the binarycomplement system,the carry chain propagation delay of add operation cannot be effectivelyovercome.But the adder is the foundation of digital computing,one of two basic modules indigital signal processing---multiplier---is also composed of adder.If the add operationdelay is too large, the performance of the whole system will be greatly restricted.In order toimprove the performance of the adder, people put forward adder structures such as the carrylookahead adder, carry retaining adder, the parallel prefix adder and other kinds of adderstructures in order to optimize its performance.although adder of these structures hasimproved its speed to a certain extent,the expense is of the increaing the chip area,andderive another increasingly prominent contradictions-power consumption.Thus in digitalsignal processing, striving to improve the adder and multiplier operation efficiency, hasalways been the direction of people’effofts,to.remainder system,with its natural parallelcharacteristic,strong ability of error control and error correction,provides a new train ofthought in the design of digital signal processor.According the most inportant module in the design of digital filter under RNSsystem,we put forward a new method.This method overcome some disadvantages in thedesign of traditional multiplier,that is too much part of the product are produced,whichcause the operation delay larger. The most commonly used encoding method in the designof traditional binary multiplier is BOOTH encoding.,BOOTH encoding is superior, but stillincludes some unnecessary operation,such as ’0’, which is not in operation in the actualprocess of multiplication,these unnecessary steps,can completely be avoid by optimizingencoding method.in this paper,by bringing the efficient csd enconding technology andradix-boothencoding techniques together(we might as well call it BOOTH/CSD hybridencoding),the deficiency of the BOOTH encoding is avoided.Another problem in RNSsystem which is urgent to be solved is B/R conversion,the so-called R/B converter,refers to the conversion from the RNS system to the binary system,the reason why it must have theconverison process is that the RNS system is a non-weight numerical representationsystem.purely according that system,you can’t obtain the message of size\positive ornegative\parity and other relative information. in the design of large scale interatedcircuit,the data overflowing is also an important place to deal with.the scaling technique isan useful algorithm for dealing with it.in a binary system,we often ensure the correctness byextension and cutting operation. In the same way,in an RNS system,we can alse use simliarscale technology.but the scale technology under RNS system is more compplicated,it stillhas no efficient algorithm,that an another reason that limit the RNS system used in thedesign of VLSI. |