Design And Verification Of I2C Bus On Chip

Now the design of SOC is usually based on IP cores (Intelligence Property),so it is getting more and more important to use IP core and programmable logic device in the course of design reuse.Simulation and verification is the most complex and time-consuming process during IP development,but it is very important.While by establishing hardware simulation and verification platform,we can simulate and verify IP Cores conveniently and efficiently,and when simulate different IP cores,we just need modify the simulation parameters a little, therefore we can save a lot of time and energy. on the IP simulation and verification.In this theme, the author introduces correlative concepts and theories, such as the concepts of SOC and IP, IP reuse, IP simulation and verification, I2C bus specification etc. Have explained I2C bus protocol and basic structure, IP module design method and procedure in detail in thesis.According to the function of I2C bus,divide the whole IP into some of interface part, control part, clock signal part, the decode of mode register. Then put forward the verification technique about I2C module, including Constrained Random Test method based on E language, verification tools using Specman Elite and NC-Verilog. In the end, the autbor does detail theoretical research on the radical modules of the platform, and gives the realizable method.