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Research And Design Of Motion Compensation In H.264 & AVS Video Decoder

Posted on:2008-03-22Degree:MasterType:Thesis
Country:ChinaCandidate:N ShaoFull Text:PDF
GTID:2268360212976277Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
Today, video & image processing is widely used in the following fields: digital TV, video conference, monitoring and control system, network teaching, remote diagnose, etc. It will place very high demands on devices for the transmission, storage and computation. The high variety in video compression needs the device at user-end to support more than one kind of video streams. Meanwhile, in a portable multimedia device, high demand is also placed to the small area and low energy consumption.As a result, we need to find a video decoding device, which can not only support different video standards, but also be small and power saving.In a video decoding device, the motion compensation module plays rather an important role in the computation complexity and memory access. In this thesis, a hardware/software co-design for motion compensation is proposed, which can be used in a H.264/AVS multi-standard decoder. This thesis consists of the following contents:First, the thesis presents an overview on the video compression standards, introduces the theory of motion compensation. After that, a detailed comparison between H.264 and AVS on motion compensation is presented, with the reconfigurable analysis followed it.After that, this thesis does a research on the hardware/software co-design method, analyses the computation in motion compensation, then a structure of H.264/AVS motion compensation based on the hardware/software co-design is presented facing the SDTV decoder. The design of memory is also rather important, contribution of motion vector and reference index is investigated and analyzed. Then an effective memory storage/access scheduling is proposed for motion vector information and pre-fetched blocks. Besides, in order to do high paralleled computation for interpolation, a hardware coprocessor supporting both AVS and H.264 decoding is designed.At last, the proposed motion compensation design is verified, and the result is compared with other existed design. Performance of this design shows a great increase as expected.
Keywords/Search Tags:motion compensation, AVS, H.264, hardware/software co-design, reconfigurable system
PDF Full Text Request
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