Design And Research Of Memory Interface On DSP

With the rapid development of microelectronics process technology, various modules withincreasing functions, such as processors, memory, analog circuits or RF circuits, have been ableto be integrated on a VLSL chip, namely system chip. Memory, the indispensible component,plays a significant role in any system chip. As its independence in memory function, IP coreoften has to be put into use directly for shorting design period in system design. While at thesame time, the interface circuit that is compatible to the system is also needed to ensure theaction of the memory without affecting the system performance. Therefore, the interface circuitdesign of the memory has always been the focus of the system design.Digital signal processors, the basic device of the consumer, are widely used incommunications, radar, sonar, remote sensing, biomedicine, robotics, control, precisionmachining, voice and image processing. The DSP chip abroad has been set as an example inthis paper. The embedded memory interface circuit design has been described in details, amongof which, the FLASH and DARAM interface circuits are the research focus and a reference tothe DSP or SOC embedded memory interface circuits design.Concerning with the design of the FLASH interface circuits, the behavior mode l of theFLASH modules should be established at first, and combined with the DSP core. Through theexecution of the DSP core, the FLASH can be operated, the changing signal can also beobserved, thus the function principle of the FLASH interface circuits can be analyzed, and theresearch of various arithmetic operations can be conducted. DARAM is specially designed forcertain instructions, which can complete twice read and write operation within one clock period,defined as the dual-access. As a consequence, the character of DARAM can be realized whencertain instructions are executed. In addition to the analysis of the circuit function, thesimulation of overall circuit is conducted, and part of the circuits are transplanted to theBCD180technique to fulfill the layout drawing.