Verification Platform For Multi-channel Communication SoC

As a development trend of IC design,SoC (System On Chip) already has a verybroad market and the verification has been a vital part of the SoC design processVerification process occupys about80%of the SoC design time.The biggest differencebetween the SoC and ASIC is the size of design and the complexity of the system.Inaddition to a large number of hardware modules, SOC also requires a lot of firmwareand software, such as operating systems, drivers, and applications, etc.This requiresconsidering the verification of hardware and software in the SoC verification process sothat the software and the hardware can work well together.Board-level verification cansatisfy these requirements of SoC verification and can to a large extent accelerate itsverification process.Most traditional hardware verification platform based on FPGA chips.As SoC’sfeature more perfect and scale larger，platform only based on FPGA can not meet theSoC verification requirements any more.On the basis of traditional platform，this paperwill design a verification platform for Multi-channel communication SoC which basedon FPGA and multicore DSP. Firstly, this paper analyze the board-level verification’sfeatures, advantages and disadvantages and point out the necessity and limitations ofboard-level verification. Then, we propose Pin-to-Pin combined with a shared-businterconnect structure and choose high-speed serial bus as platform’s interconnectscheme. For platform’s demand for high-speed communications applications,we choosetwo high performance FPGA for high-bandwidth applications and a multi-core DSP formobile communications field as the core chip and determine the platform’s overallstructure. Then design the platform’s circuit in detail from the power supply system,storage system, interconnection module.etc. Finally, we analyze the key point,high-speed peripherals, of the platform’s design and test high-speed peripherals’performance.