| With the rapid development of technology and processes, integrated circuitdesign, power consumption becomes a very critical issue, conventional low-powerdesign techniques mainly focus on dynamic power estimation and optimization started.After entering the deep sub-micron process, there have been many new powerproblems, such as leakage current caused by the rapid growth of a series of newproblems arise. Low-power design is also facing more problems and higher demand,especially for power consumption increases more sensitive applications, such ashigh-performance computer systems, portable electronics, mobile communicationsproducts. This study were to study the dynamic power analysis and optimizationanalysis and static power consumption in leakage current.The main content of this paper has the following three aspects:In this paper, in-depth research and analysis of digital integrated circuits basedon power consumption, mainly for the following work:1power analysis to analyze the composition and power consumption CMOScircuit, the basic method of the circuit design of low-power design and application ofdifferent levels of low-power technology.2studied the characteristics and basic power analysis methods and features andpower estimation method, and compared different analysis methods, on this basis, tostudy the power model and power analysis.We studied the basic strategy of low-power digital circuit design, detailing fromthe process level, circuit level, layout level, gate level, register transfer level, thealgorithm level to system-level design of the various levels of power optimizationmethod, and introduce the characteristics of the different methods.Although digital IC power analysis and optimization has been developing indepth, but the prospects for the development work already done, and low-power design point of view, but also in the development of low-power IP library and thedevelopment of low-power high-level synthesis technology and other more in-depthstudy and exploration. |
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