Design Of A High-Precision△-Σ ADC For Audio Codec

Featuring the oversampling and noise-shaping,△-Σ data converters have been widely applied to fields of high-precision data conversion such as the modern portable audio application, in which the high-precision and low-power design is of crucial importance for△-Σ ADCs to meet the demands of high-fidelity and long battery-life.This thesis proposed a design scheme of a△-Σ ADC system for audio codec, including the core△-Σ modulator and a digital decimation filter. Firstly, the ideal model of the△-Σ modulator was built using a timing-optimized feedforward structure. As a complement to Matlab simulation, theoretical calculation of integrators’ non-ideal factors was carried out, including sampling capacitances, and finite DC gain, GBW, SR of operational amplifiers in the integrators. Besides, considering flick noises and non-linearity of the feedback DAC, a whole system model of the A-E modulator was achieved and the design parameters of those integrators as well.During the circuit design of the△-Σ modulator, the key is to design the amplifiers in the integrators at low power consumption. In order to achieve wide GBW and high SR, current-starvation technique, resistors compensation and SR boosting technique were introduced to meet the design specifications and greatly reduce power. The simulation results show that the SNDR is as high as106.4dB with the input signal of-4.35dB amplitude. And the power consumption and FOM are3.86mW and565.750/Conversion-step respectively. This modulator has been implemented in the GlobalFoundries0.18um BCD IP4M process, and post-simulation results show that the design requirements are satisfied well.Besides, the design of the digital decimation filter has also been finished, which consists of a CIC filter and two half-band filters. The CIC filter was designed using its non-recursive low-power structure. Based on CSD coding, the algorithm of the half-band filters was optimized to further reduce the hardware overhead and power. The post-simulation results show that the filter has good functions of down-sampling and filtering, and will not affect the output performance of the modulator.Finally, combining the modulator and decimation filter, the whole layout of the△-Σ ADC system has been finished.