| Along with the video monitoring in the daily life of popularization and application of the cost of monitoring and control system, transmission rate, transmission reliability and stability of put forward more and more high demand, system equipment general, compatibility, later maintenance and flash of friendliness is also must consider the question. Taking security video monitoring system to store and display as the research object, a deep research on the input image data buffer, storage, to read and display, for future security video monitoring system application development and the realization of high speed image data acquisition and display lay the foundation.This paper firstly introduces the security video monitoring system storage and display of the necessity and significance of ATA hard disk drive storage development present situation, and VGA display technology application and profile is presented, and then on the system overall design, and finally to each part of the design and the simulation result.In the monitoring system, in order to improve the ATA interface hard disk storage space utilization, need to take multiple image data of single way a wide transformation and multiple splicing after storage, and external input of continuous data flow rate and ATA hard disk intermittent write operation are not synchronized, the need for data buffer in order to avoid data storage mistake, this will spend a lot of time and storage resources; Due to the large number of FPGA internal resources and the price is expensive, CPLD and external FIFO the price is relatively cheap, the CPLD and FIFO data buffer way, FPGA only complete and ATA interface hard disk interface storage sequential control. In addition the USB2.0control chip for ATA hard disk interface of the image data to read, check the correctness of the data has been stored.In the VGA display part, first of all from the ATA hard disk based on FPGA in sensing image data, conduct data after the split with behavior unit into external FIFO in cache, then the SRAM internal partition way to frame for the unit image data cache, high-speed intermittent way to write and read in the SRAM data, and use FPGA to realize internal FIFO SRAM read data buffer, and finally to the whole frame continuous data stream mode on the output, the VGA interface chip into analog signals can be sent to the monitor to be displayed.According to the video monitoring image data storage and display, with the characteristics of programmable logic devices (including FPGA and CPLD) design the corresponding data storage and display solutions, systems agile easy to meet different application requirements, solve the ATA hard disk storage data width and input data inconsistency and write operation synchronization problem, to overcome the ATA hard disk storage data width and output data inconsistency and read operation are not synchronized, so as to meet the high speed continuous data flow uninterrupted storage and real-time display requirement. |
