The Research Of Techniques For Multi-bit Σ-Δ Analog-to-digital Conversion

Σ-Δ analog-to-digital converter (ADC) is widely used in video, multimedia,seismic survey instrument, sonar, electronic measurement and moderate resolutionsystem because of its good linearity, high precision, low power consumption and otheradvantages. At present, multi-bit quantitative Σ-Δ ADC with high precision technologyis a hotspot research, while the domestic research is still in its beginning stage.Compared with foreign advanced level, there is a big gap in Σ-Δ ADC architectureresearch and design level, so if we want to have the Σ-Δ ADC with independentintellectual property rights, strengthening the research and development efforts isnecessary. Therefore, the research of multi-bit Σ-Δ ADC technology has importantsignificance both in technology and economy.This paper expounds the basic principle and structure of Σ-Δ converter, as well asthe key technologies in the design of multi-bit quantitative Σ-Δ ADC. The multi-bitquantitative structure is studied based on the various structures of Σ-Δ ADC, and therelationship betwen quantizer digits and Σ-Δ ADC’s precision is discussed. Then a24-bit quantitative Σ-Δ ADC is designed by using multi-bit quantitative Σ-Δ ADCtechnology.In the process of the system level design, the first thing is designing the Σ-Δmodulator system. The parameter and structure of Σ-Δ modulator are determinedaccording to the knowledge of Σ-Δ modulator, and the model and simulation areconducted by MALTAB and Simulink. Finally, the structure of Σ-Δ modulator is third-order and three quantitative monocyclic CIFB (Cascade-of-integrators, feed-back form),and the sampling rate is256. Secondly, the digital sampling filter is designed. Thestructure and type of digital sampling filter are determined based on the performance ofΣ-Δ modulator. The extraction filter uses cascade structure with comb filter and two-order half-band filters. According to the requirements of system performance, the combfilter and half-band filter are designed in MALTAB. Finally, this paper establishes themodel of multi-bit Σ-Δ ADC in Simulink, and conducts simulation experments. The simulation results show that, the effective digits of multi-bit Σ-Δ ADC designed in thispaper is24bits, and the signal-to-noise rario (SNR) is144dB, which verifies therationality of multi-bit quantitative structure.Through the system design of multi-bit Σ-Δ ADC, the parameter and structure ofΣ-Δ modulator and digital sampling filter are determined, according which, the rightcomponents and operational amplifier are chosen, and the circuit with discretecomponent of Σ-Δ modulator including the third-order integrator,3-bit quantizer and3-bit feedback DAC are designed. In addition, the digital sampling filter is designed in theFPGA implementation, and the Verilog code of digital sampling filter is wrote.