| This paper described the design and verification of image processing IP core, which was the module of the low-level image pre-processing SoC in infrared imaging guidance. In this SoC architecture, the uncooled infrared detector collected infrared image, then through the various modules of the SoC, to complete the image pre-processing operation, such as histogram statistics, bits width transformation, nonuniformity correction, spatial filtering, connected component labeling,etc. Then output the processed image.This paper mainly included two parts of work:the design of IP and the functional verification of IP. The design of IP mainly referred to the design of the histogram statistics and bits width adjustment IP core, we completed partial digital IC front-end design process of this IP. such as the structure design, RTL coding, function verification, etc. Under the SMIC0.18um CMOS process, we synthesized the histogram statistics and bits width adjustment IP core with Design Compiler, the chip area was0.154mm2and power consumption was16.4983mW when operate at the frequency of100MHz. In the verification of IP. this paper realized the functional verification of the histogram statistics and bits width adjustment IP core and the configurable window function IP module. We introduced the use of the Modelsim platform to complete the function simulation of IP core. We coded testbench which has high functional coverage, to test the various functional requirements in design specification. Then compared with the theoretical results calculated in Matlab. Therefore verified the validity of the function. |
