Research And Design Of15Bits Discrete-time Sigma-Delta Modulator

Displacement sensors whose output analog signals need converting to digital signals, are widely used in domains like industry, instrumentation, and national defense. Sigma-Delta modulator exploits oversampling and noise-shaping technique to decrease in-band noise power. High conversion resolution can be achieved after filtering the out-of-band noise components using digital filter.Firstly, basic principles and mathematical model of Sigma-Delta modulator are analyzed, the effect of quantization gain to transfer function is also included. According to the design requirements of displacement sensor, an architecture of discrete time second-order one-bit with oversampling rate of512and1MHz sampling rate are used. MATLAB-SIMULINK is used to model and simulate the performance of system-level structure. The spectrum analysis of output time-domain signal is emphasized. Signal dynamic range is the primary consideration in determining integrator and one-bit DAC gain. Next, transistor-level circuit is presented in accordance to system model. Non-idealities affecting the dynamic performance of modulator are analyzed in detail including clock jitter, switch noise, op-amp noise, finite op-amp gain, finite op-amp bandwidth and slew rate, output voltage swing, etc. Models of these non-idealities are also presented in SIMULINK, within which circuits specifications are extracted under the trade-off between resolution, chip area, power consumption and output voltage swing. At last, all transistor subcircuit including switch, two OTAs, switch capacitance CMFB, clock generator, comparator, D flipflop, buffer amplifier, one-bit DAC and bias circuit are designed and simulated.TSMC0.18μmm mixed-signal CMOS process is used to simulate the whole modulator circuit above in HSPICE software, power supply voltage is1.8V. When input sinusoidal Peak-to-Peak amplitude of0.9V and frequency of473Hz is applied, simulation indicates a SNDR of94.5dB and ENOB of15.40bits. While the frequency is76Hz, SNDR and ENOB are94.6dB and15.43bits respectively, Power consumption is less than200μmW.