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Design Of Sigma-Delta A/D Converter For Digital Audio Processor-Modulator Part

Posted on:2009-11-13Degree:MasterType:Thesis
Country:ChinaCandidate:L LiFull Text:PDF
GTID:2178360272456849Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Sigma-Delta ADCs can achieve high resolution based on over-sampling and noise-shaping techniques. Comparing to conventional Nyquist converters, Sigma-Delta converters avoids the high requirements of high performance and precisely matched components in analog circuit design. Additionally, it takes full advantage of modern VLSI technology, which features high speed, high density and low cost. Currently, Sigma-Delta ADCs have been widely used for audio A/D conversion and become the mainstream technology.In this thesis, A second-order sigma-delta modulator for digital audio operational chip is designed. The sigma-delta modulator is realized by over-sampling and noise-shaping techniques. In order to enhance resolution of analog-digital converter, two points should be considered: firstly, to enhance over-sampling rate. Secondly, to add the sigma-delta modulator's order. Nevertheless, excessive over-sampling rate will bring difficulties to the design. So, a moderate method is to have a trade-off between over-sampling rate and modulator's order. In this thesis, a 14-bit resolution sigma-delta modulator is designed which is based on a second-order architecture and 256 over-sampling rate(OSR).Based on the theoretical work, the behavioral of the modulator is simulated by Matlab Simulink. The experimental modulator has been designed with fully differential switched-capacitor circuit. According to the feature of the system, structure optimization, overcome of non-idealities and performance improvement are analyzed Based on the above works, switched-capacitor integrator, fully differential cascade operational amplifier, non-overlap clock, voltage reference, comparator, all of the blocks have been designed. The schematic simulation is by the tools of Cadence Spectre and Hspice with HJTC 0.35-μm CMOS technology. Finally, it is shown good circuit simulation results of the Sigma-Delta modulator whose signal-noise rate is 86.5 dB.
Keywords/Search Tags:oversampling, sigma-delta modulator, switch-capacitor circuit, differential amplifier, clocked comparator
PDF Full Text Request
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