FPGA Verification Of NAND Flash Controller

With the complexity of ASIC design getting higher and higher, verification isbecoming more difficult. The purpose of FPGA verification is to verify design withFPGA in the practical application system but not with ASIC samples. Due tosimulation software usually work in the ideal environment, some hidden problemssuch as delay are difficult to be found. But FPGA verification is to verify design inthe real physical environment; therefore it is easier to find errors. So designengineers can find and resolve these errors before tapeout.First of all, NAND Flash specification manual is studied. The internalstructure, external pin and common operations command of NAND Flash areanalyzed. Each operation flow of NAND Flash is analyzed.Bad block managementand synchronous interface timing of NAND Flash is expatiated.Secondly, the simulation of NAND Flash controller is executed.According tothe NAND Flash specification manual,a detailed verification plan is developed.Atest bench is establish. The comprehensive simulation of NAND Flash controller isexecuted based on the test plane.Finally, FPGA verification is executed for NAND Flash controller. Theconversion of ASIC code to FPGA code is implemented, and the simulation ofFPGA code is executed. FPGA verification platform is developed using FPGAdevelopment board HAPS-51T. Due to FPGA verification is executed for NANDFlash controller respectively, the products of Samsung and Micron NAND Flash isused. The verification results show that NAND Flash controller works perfectlynormal.FPGA provides a real physical test environment, and improve the efficiency ofthe verification. Ensure the successful completion of verification.