Font Size: a A A

Study On High-performance Network Processing Card Based On FPGA

Posted on:2014-09-18Degree:MasterType:Thesis
Country:ChinaCandidate:H ZhangFull Text:PDF
GTID:2268330401980849Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Requirements of network applications are increasingly high, with thedevelopments of China’s economy. Data throughput of ordinary network card can nolonger meet the special application of some special occasions; packet loss is afrequent occurrence when the ordinary network card is to deal with a large numberof netwok data packets in a short period of time. This paper combined the FPGAtechnology with the Ethernet technology, the embedded Ethernet MAC technologyof FPGA is applied to the Ethernet. It researches and designs a kind ofhigh-performance network processing card to replace the ordinary network card,which improves the network data throughput greatly, which solves packet losscompletely, which meets special applications of some special occasions.Firstly, the paper elaborates on the technology of commonly used network datapacket processing presently, and analysis of domestic and international situation inthe network data packet processing area. Then the paper shows practical significanceof achieving the high-performance network processing card.Secondly, the technology of bus master DMA is analyzed. The main purpose ofusing the bus master DMA technology is that Ethernet network data packets of at theend of the PC host computer are transmitted efficiently to the underlying logiccontrol section or Ethernet network data packets of the underlying logic controlsection are transmitted efficiently to the PC host computer end. Ethernet networkdata packets are assembled in the side of the test application of PC host computer,firstly, Ethernet network data packet transmission function SendPacket of the upperAPI function is called, and then the correlation function of PCI Express which isbased on DMA transmission mode is called in the SendPacket function, finally,Ethernet network data packet is transmitted to control portion of the underlying logicby using the DMA transmission mode of bus master DMA technology. However,when Ethernet network data packet of underlying logic control section need to betransmitted to the PC host computer side, firstly, these Ethernet network data packetsare uploaded to the driver layer of the PC host side by using DMA transmission mode of bus master DMA technology, and then the correlation function of PCIExpress which is based on DMA transmission mode is called to transfer theseEthernet network data packet to RecvPacket function of the upper API function,finally, the test application gain these Ethernet network data packets in theRecvPacket function, and these network data packets are analyzed.Thirdly, the paper describes the hardware system platform using theXC6VLX240TFF1156-1FPGA main chip as the core processing unit. The hardwaresystem includes mainly PCI Express insert, storage equipment, Ethernet port, JTAGand power. It mainly introduces the connections between each module.Finally, the paper designs the software based on the hardware platform. Thetechnology of bus master DMA design and the IP core which ISE comes with areused. The function of the software includes the transmission of Ethernet networkdata packet, the reception of Ethernet network data packet and the filtration ofEthernet network data packet. In additions, much optimization has been used to meetreal time demand. In the end, the experiment has had satisfy result.
Keywords/Search Tags:FPGA, Gigabit network, XC6VLX240TFF1156-1, Direct MemoryAccess, Ethernet network data packet
PDF Full Text Request
Related items