The Research Of The FPGA Design Of The Key Module In H.264/AVC Standard

In recent years, communication network technology and also computer technologyhas made great development, people’s work and life style also changed very big, peopleput forward more requirements for communications in the field of diversity, thetraditional audio signal business has already can’t satisfy people’s requirement, a newvideo business includes visual telephone/video conference, video on demand, videomonitoring and mobile video services becomes more and more popular in People’sDaily work and life, also has high requirement of video quality and the real timerequirements. As a new generation of video compression coding standards, H.264/AVC can get higher compression ability under acceptable image quality, so it is verysuitable for video business now, also it is generally regarded as one of the mostinfluential industry standard now. But getting the higher compression ratio needs highercomputing complexity, So for the study of the theory of the standard has become thecurrent hot spots, and the hardware implementation of the algorithm is now a focus ofresearch.This paper maily study the key techniques and algorithms of the H.264/AVCvideo compression coding standard, the main work is as follows:1) Learn the standard basic class of the H.264/AVC, and study the key technologiessuch as the coding of the intra prediction, the coding of the inter prediction, integertransform, quantization and entropy coding.2) Focus on analysis the three key technologies of the integer Transform (Discrete’Cosine Transform) and quantization and entropy Coding (Context-based AdaptiveVariable Length Coding, CAVLC), Based on real time requirement, we us the idea ofmodular design. and combining with the resource utilization we put forward hardwareimplementation scheme Based on FPGA. Key processing includes, the matrix operationin integer transform uses the parallel way, also the whole scheme meet the assemblyline structure, the transformation of the multiplication and division use the simple left and right shift operation, entropy coding calculation instead of the usually used in thequery code table method, etc.3) We use the verilog Hdl (hardware description language) to design hardware circuit,and do function simulation using the simulation software of modelsim SE10.0, and dosynthesizing and verification,At last we gives the simulation results of some key circuitand resource consumption, effectively verify the feasibility and effectiveness of thesystem.