Implemnetation Of650V Thin-film SOI Devices

SOI high voltage integrated circuit is becoming the trend of smart power IC due tothe advantages such as superior isolation, high speed, low power dissipation, highreliability and facility of compatible process. When integrate high voltage and lowvoltage on same chip, the superior isolation of SOI devices is a prominent merit forsmart power IC. Compared to junction-isolated devices, SOI devices have lower onresistance, and IGBT only can be fulfilled in SOI wafer. With the decrease in thethickness of the SOI top silicon layer, it can bring more advantages, such as Isolationeasier, more integrated, and the kink effect is smaller. Because of these advantages, thethin silicon layer of SOI technology provides a very good direction for the developmentof PIC.In order to meet the needs of the ballast applications, this thesis presents a linearvariation of doping, thin film SOI high voltage device with top silicon layer thickness of1.5μm and buried oxide layer thickness of3μm. The drift region is linear doped andthinned to0.5μm by high temperature local oxidation (LOCOS). Due to the thin filmdrift region, the vertical ionization integral path is shortened and the carriers are difficultto be accelerated to the level required for impact ionization. This will increase thecritical breakdown electric field of the SOI layer which leads to great improvement ofthe field of buried oxide layer and vertical breakdown voltage. The lateral drift region islinear doped, with gradually increased doping concentration from source to drain. Thisstructure on the one hand optimizes the lateral electric field which improves the lateralbreakdown voltage. On the other hand field plate reduces the on resistance.By process and device simulation, we designed linear variable doping technology.And the influence of structure parameters such as the thickness and length of driftregion, drift region implant dose, field plate will be analyzed and optimized. Thecharacters of threshold and on-state breakdown are also analyzed.Base on device fundamental analysis, we have developed the compatible process.High temperature diffusion is adopted to thin the drift region and anneal the linear doped drift region. Then the layout is finished. Test result: the maximum breakdownvoltage is870V, and threshold voltage is2.5V. Stable breakdown voltage of740V for60um drift region and700for50um drift region are obtained.