Research Of Dual Chanel High Speed Data Acquisition Card

With the development of computer and microelectronics technology, thereare higher requirements for data acquisition system in Radar, communicationsand many other applications. it trends sharply towards multi-channel, highsampling rate, high resolution, high-capacity storage and high-speed transferrate for the data acquisition system. Based on the current status of domestic andinternational research, this paper developed a kind of dual-channel high-speeddata acquisition card, based on the PCI bus, reaching a dual-channel samplingrate as1GSa/s, and a single-channel sampling rate as2GSa/s,,8-bitresolution and2GB high-speed data cache.For hardware circuit design, First of all, according to the technicalrequirements, the overall scheme of a dual-channel high-speed data acquisitioncard is brought forward with the core device used in the program compared forselection. Secondly, use the modular design to divide the entire data acquisitioncard into the following modules: high-speed data acquisition module,high-speed data cache module, communication module, controller and the powersystem module, whilst launching the detailed design of each module.High-speed data acquisition module includes three components, the ADCfront-end input circuit, the ADC circuit and the ADC high-speed clock circuit.The ADC front-end input circuit is used to process the input signal, so as tomeet the requirements of the ADC input signal, high-quality and low-jittersampling clock is supplied by the circuit of the high-speed clock. DDR2SDRAM memory is used as large data cache, and the cache depth has been up to2GB. With the data bandwidth reaching up to4.272GB/s, the DDR2SDRAMmemory can absolutely meet the design of real-time data cache. According tothe PCI interface used in the communication module, special interface chipPCI9054is chosen to enable the communication between the data acquisitioncard and the PC, which supports DMA data transfer as well. In addition,high-performance FPGA is used as the master controller to achieve the controlof each module. Power system module provide accurate, low noise powersupply in line with the voltage and power requirements from the various parts. Finally, the printed circuit board (PCB) is designed with Cadence’s Allegrosoftware, whilst simulating the key signal network to ensure the reliability of thedesign.The entire logic design is divided into the following several parts:high-speed data reception module, high-speed data cache modul, the interfacecommunication module and the data acquisition control module. Among them,the data acquisition control module includes the ADC expansion of control andhigh-speed clock.The test results and performance analysis of the dual-channel high-speeddata acquisition card are given at the last chaptor of the paper. The results showthat the data acquisition card can meets the design requirements, and also has ahigh performance.