Design Of An High Speed And Large Capacity Data Acquisition Unit

Data acquisition memoryisthe key equipmentto getthedigital signal. Especially inradar,image processing, sonar, communications andotherfields. Thecollectionreservoirhavingahigh-speed samplingrate, memory depth, portability and highreliabilitycharacteristicshasbecome increasingly importantapplication.Cable applicationsbecomeincreasingly widespread. But with the increaseinthenumberofcableandlongeroperation time Cable fault ismore and more frequently. So data acquisition systemviaacablefault dataacquisition and analysis is very necessary.On analyzing the development status, application requirements and advancedtechnologiesoftheacquisition and storageequipment proposed Implementation ofHigh-speed data acquisition andhigh-capacitysolid state memory. The core isHigh-performance A/D. Design uses the basicarchitectureoftheFPGA to control theA/D andDDR2SDRAM.In it DDR2SDRAM asthememory device fortherealizationoflarge-capacity data storage. And at the same time taking full advantageof the FPGAprogrammability to achieve a system which isflexible andreliablecontrol.Multi-stage pipeline technology is introduced to the design to get the ability ofReal-time storageofhigh data rate. Besides to ensuretheintegrityofthesignal high-speedPCB design principlesbasedmulti-layer circuitboardwiring anddevice layout.Independent A/Ddrivers the clockanddistributedpower supply is in thedesign.In thispaper, themain research contentsare the following:1. Cable fault detection scheme.Theoretical design specificdesigncombinationcanbe realizedfromthespecificdesign specifications.Selecttheoptimal solutiontodesignhigh-speeddata acquisition systemforcablefault detection.2. Data acquisition hardware design.High-speed data acquisition systemis madeup ofthedata acquisitionand controller. The papersonlydo a specifichardwaredesignofitsfront-enddata acquisition. Including data acquisition, data storage anddatatransmission, and the controllerdesign.3. Interface design basedonFPGA designofhigh-speed analog-to-digitalconverters.DDR2SDRAM interface design and the control of theinterface cardPEX8311ofPCIexpress design.At the same time introduced the correspondingModelsim simulation results. Verify thecorrectness of the designoftheFPGA logic.