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Research On High Speed Data Acquisition Technology Based On ARM&FPGA

Posted on:2009-03-25Degree:MasterType:Thesis
Country:ChinaCandidate:Y T WangFull Text:PDF
GTID:2178360242966041Subject:Computer system architecture
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In this paper we have researched on design and realization of high speed data acquisition technology. We designed a shared memory structure based on ARM&FPGA. We accomplished the system software under Linux enviroment, including the touchscreen control, LCD display, sine interpolation algorithm design and various of display algorithm design.We have tested the high-speed data acquisition and processing system, and analyzed the test data.We describe our system in two ways. One is the hardware design, the other is the device driver design and application program design based on ARMlinux OS.In the hardware design, on the FPGA chip, first we converted one channel of high-speed data into four channels of low-speed data which frequency is a quarter of the original frequency with the ping-pong operation. Second we stored each channel of data in a FIFO. Third we recombined the data in the FIFOs and stored them in a double-port RAM.Last we connected the RAM to the bus of the ARM system, which is a shared memory we developed. ARM processor can read the data in RAM efficiently. We designed the sampling frequency control circuit by the FPGA, By changing the data storage frequency of the FIFO we controlled the data acquisition frequrncy.In the software design, at first we ported the ARMLinux onto ARM for more effective administration and system upgrade. Then we designed the TouchScreen device driver, LCD device driver, FPGA device driver, LCD display program and Multithreading application.The system can work stably with the sampling frequency 125MHz. It can display normally the waveform of the signal, which frequency is below 5MHz. And we can use the sine interpolation algorithm to process and display the high frequency signal, which frequency is below 40MHz. This hardware structure is a highly scalable system structure, we can achieve 8 channels and even 16 channels FIFO buffer system structure, which will make the system support higher sampling frequency.
Keywords/Search Tags:High speed data acquisition, Embedded system, Linux, ARM, FPGA, Linux device driver, Shared memory
PDF Full Text Request
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