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Research On Simulation Methods For Small Delay Faults

Posted on:2012-06-03Degree:MasterType:Thesis
Country:ChinaCandidate:L ZhouFull Text:PDF
GTID:2248330395985668Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
A new kind of faults has appeared more frequently in chips for the shrinkingprocess technologies and increasing operating frequency of ICs. Circuits would failbecause of the existence of these faults leading to delay changes in circuits-under-test.This kind of faults is called delay faults. Ultra-deep submicron and nanometer processtechnologies are likely to bring the phenomena of crosstalk noise, process variation,power-supply noise and resistive opens and shorts. They result in that the most ofdelay faults occurred are small delay faults whose sizes are less than one system clockcycle. In order to detect a small delay fault, the delay fault size must be greater thanthe slack of the sensitized path, where the slack of a path is the difference between thesystem clock interval and the propagation delay of that path. In recent years, theeffect of performance and quality caused by small delay faults in high-frequencycircuits is increasing, so small delay fault testing has become an indispensable part inproduction testing and it is paid more attention.Fault simulation is an important method to assess test quality and the faultcoverage obtained after simulation is an indicator of measuring test quality. It needsmuch more test patterns to get high small delay fault coverage because of the largescale and high complexity of ICs so that the simulation cost of small delay faultsbecomes increasingly high. In order to reduce simulation cost, this paper proposed anefficient small delay fault simulation method and implemented two small delay faultsimulators based on this method.The efficient simulation method proposed by this paper uses a new waveformexpression which is expressed by a set of binary bits. Compared with existingmethods, this method makes waveforms to be expressed simply, stored easily andoperated fast. Firstly, this paper uses a specified fault injection mode (fault injectionwith known fault size) to realize a simulator. Circuit behaviors of each fault size couldbe known in simulation process under this mode. It is favorable to gather simulationinformation, analysis fault characteristics and help other parts of testing.Experimental results show that this method can decrease both simulation time andmemory consumption sharply compared with the latest research under the same mode.These advantages are taken by the new waveform expression entirely.Furthermore, the unspecified fault injection mode is used through improving the specified fault injection mode based on the efficient waveform simulation method. Inthis mode, a small delay fault will be injected with an unknown fault size, then thedetection interval of each fault can be obtained and delay defect distribution is used tocalculate the coverage. Experimental results show that it can further improve thespeed of simulation several times.
Keywords/Search Tags:Delay testing, Small delay fault, Fault simulation, Fault injection mode, Waveform expression
PDF Full Text Request
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