| As can be seen, phase-locked loop (PLL) is a key component of wireless communication systems. Voltage controlled oscillator (VCO) is an integral part of the PLL circuit. The signal-to-noise ratio of receiver and transmitter is mainly depended on the noise performance of the oscillator. Low phase noise VCO is the key to fulfill high performance transceiver. So VCO has always been the research focus on RF field. However, low phase noise VCO is difficult to design. Because of the low Q value of on-chip passive components and inherently high flicker noise of the MOSFETs, the phase noise of VCO is poor, and the output amplitude of VCO is low, especially at the high-frequency bands. In this thesis, the designed VCO can improve these inadequacies, so it can meet the requirements of the wireless communication systems.Firstly, the thesis introduces the principle and main parameters of VCO, and expounds the phase noise theory of it.Secondly, a variety of topologies are simulated and compared. The results show that NMOS cross-coupling structure is best. The thesis analyzes the on-chip inductors, variable capacitors, and the small signal model of oscillator.Thirdly, a24GHz NMOS cross-coupled oscillator is designed based on TSMC0.18um CMOS process. Meanwhile, the design process and the key points are expounded.Finally, the thesis optimizes the designed VCO to obtain the lower phase noise circuit which has the satisfactory results. The VCO oscillates from23.10to24.74GHz with1.6GHz tuning range. The VCO shows phase noise of-92.14dBc/Hz at100KHz offset,-114.62dBc/Hz at1MHz offset,1.24dBm output power at23.91GHz oscillation frequency. |