The Design Of EEPOM Controller In Dual Interface Card

The dual interface card will be the mainstream of smart card, because of itcontains the advantage of other two single interface cards which are common in themarket. With the development of the performance of the dual interface card and therequirement of market, the dual interface will play an importance role in the cardmarket. As the EEPROM is the storage which can store data in the condition of nopower, the significance of EEPROM is self-evident.In this paper, a new EEPROM control circuit is designed based on the originalone. The new way is based on the relationship of system clock and the clock whichused to generate signals for EEPROM. By this way, the maximal speed of readingEEPROM can be increased to7.5M. This circuit can be split up into four sections,which are the part of reading control module, programming control module,self-checking control module, PUMP CLOCK generating module. The part of readingcontrol module is based on the AHB protocol and the timing of EEPROM require, togenerate the signals that require while read EEPROM, return the data to CPUaccording to AHB protocol. The part of programming control module, generate thesignals which are necessary in the sate of programming according to the timing ofEEPROM require. The part of hardware self-check is another way to test the EEPROMbesides the way of using software, the advantage of this way is that the cost of wafertest will be cheap than software. The part of PUMP CLOCK generating module isdesigned for generating clock for the high voltage generating circuit in the EEPROM,the high voltage is obligatory while programming. The whole chip is implemented withSMIC0.18um CMOS technology and designing rules. According to the result of wafertest, the function and the performance of the digital part are up to the mustard.