EPGA Implementation Of Network On Chip And Its Application In4G System

With the rapid development of system integration and process technology of IC, the communication architecture among various modules has become the key problem to guarantee the whole system performance. The traditional bus architecture of SoC (system on chip) has several problems seriously restricting the average communication efficiency, such as the huge clock tree, the high power consumption and the limited scalability. NoC (network on chip) based on network connection can solve the bottleneck problems of SoC based on bus. NoC architecture can contain a large amount of IP cores, supporting various applications. And its low power consumption, small area and the flexible characteristics make NoC very feasible and applicable to be used in future mobile terminal and4G communication system. Therefore, the FPGA implementation of NoC and its application in4G communication system are the key points in this thesis.At first, the basic concept of NoC and the important related problems are summarized and analyzed, especially the switching mechanism and the flow control mechanism. Then the thesis describes the research status of NoC application in4G communication system. After that, this thesis designs and implements a classic router for a2D mesh NoC using verilog. This NoC router includes five input buffers, five input/output flow control modules, a head decode module, a routing compute module, a control logic module, a virtual channel arbitration module, a switch arbitration module and a crossbar. Further, the simulation result and resource consumption are presented and analyzed, which has verified this router can successfully complete the routing function as the wormhole switching mechanism. At last, the thesis proposes an OFDM receiver in the future4G system based on the NoC communication architecture and gives the simulation results to verify the overall correctness.