Research And Design On Architecture Of Router System-on-Chip

In order to meet the increasing requirement of higher network transmissionefficiency, various further studies about the Internet Protocol Router, the core equipmentof Internet, whose performance directly determines the performance of whole networksystem, have been taken by researchers. Meanwhile, as the security situation isbecoming serious, many security policies were proposed by researchers to ensure thenormal operation of the network. In this paper, our researches mainly focus on theproblems of current network data transmission efficiency and data security. Based onthe analyses and summarizations of those key technologies such as the deep packetinspection technology of network security, feature (schema) matching techniques, routerSoC architecture, on-chip communication, diagnosis technology for interconnectstructure and function verification, a novel solution idea is proposed, which providessome useful reference for improving the router data transmission efficiency and datasecurity of new network.The major contributions of this dissertation are as follows.1. Further researches of the on-chip communication scheme of router SoC aretaken based on the network on chip technology. A shortest path algorithm based onMobius cube which can find a shortest path quickly is proposed in this paper, and onthis basis, a multiple shortest path search algorithm is proposed, which can find all theshortest paths between the source node and destination mode at the same time.2. A router SoC architecture based on the0-Mobius and1-Mobius cubes ofdimension2, i.e. Hierarchical Routing Cross-Connected Mesh(HRCM), is proposed inthis paper, then a hierarchical routing algorithm HXY (Hierarchical XY) is derived fromthis architecture to perform the functions of switching and forwarding and realize thedistributed forwarding and switching. The simulation results show this structure hasgood performance and scalability.3. A hierarchical fault-tolerance ring NoC topology is proposed in this paper, inwhich links are divided into two groups rings. One group is used for fault-tolerance incase of the other group fails. Ring network adopts Time-Division Multiplexing andpriority mechanism to implements space-division-multiplexing of bandwidth and fairrouting. Simulation results show that the architecture can avoid traffic congestion,deadlock and hungry and ensure use of bandwidth effectively.4. A fast condition diagnosis algorithm of HRCM topology under the condition of the PMC model is proposed in this paper. First, traverse all the HRCM by using thebreadth-first search and categorize the HRCM nodes into several sets based on thediagnosis results between adjacent nodes, then identify the fault set and fault-free setthrough the relationship between sets and the amount of the elements contained in thesets. As for the n-level HRCM, the time complexity of this algorithm isO (N2). Thealgorithm can be extended to multi-dimensional cube，ie. Hypercube，Used to diagnoserouter system.5. A pattern matching algorithm aiming at network content detection is proposedfor deep packet inspection system, i.e. regular expression pattern matching based ondistributed storage (REPMBDS). Simulation results show the proposed algorithmcompared to conventional matching algorithm can improve at least five times inprocessing time performance, which makes it effectively to handle the real-timedetection of the network intrusion in high-speed, large-capacity Internet.6. A general router SoC functional verification testbench based on NetFPGA isdesigned and implemented in this paper. This testbench achieves the functionalverification of different router SoC systems by performing dynamic systemconfiguration on its software module. The router SoC based on4*4HRCM is designed,and verified. meanwhile, the router SoC with deep packet inspection system is verifiedusing this test platform.