Design And Implementation Of Integer-transform And Loop-filter Modules For AVS Codec

With the increasing performance requirements of digital video applications andthe rapid development of large scale integrated circuit technology, AVS codec need forfurther research, optimization, and improving. Therefore, design and implementationof high-performance audio-video codec have great significance.This paper describes the overall video compression algorithms and videostandards’ development process. Then details the AVS video standard to analyze theprinciple of its codec, and then focused on the integer DCT principle and loop filteringprinciple. Then designs and implements integer DCT module and the loop filtermodule in the RTL-level, and effective optimization methods for the problems ofdesign is proposed. The main work and innovations are as follows：(1) Design AVS integer DCT module, the logic for butterfly transformation is solong that the operating frequency of entire integer transform module is not high, thispaper uses multiple registers in the butterfly transformation, make assembly line toimprove the system’s operating frequency.(2) Design AVS integer DCT transform module, by studying the workingcharacteristics of transpose register, this paper uses the remaining memory cells toachieve assembly line operations, which will reduce two transpose register to one,effectively reducing the size of integer transform module.(3) Design AVS loop filter module, by designing each module of logic filter to beassembly line, this paper decompose path delay caused by the complex logic filteroperation to4clock, thus reducing the critical path delay and improving the overallfrequency of filter module.(4) Design AVS loop filter module, this paper only buffer the bilateral filter block,partial filter blocks only to read from external memory to the on-chip SRAM whenneeded. This method reduces the memory bandwidth and cache Size requirements.Optimization of on-chip SRAM is organized, making efficient use of buffer data inorder to achieve the maximum degree of parallelism.(5) Design AVS loop filter module, this paper optimize the boundary filteringorder of AVS loop filter, to improve data utilization, thereby reducing the number ofvisits for memory, speed up processing speed.Finally, the simulations of various modules show that the simulation results areconsistent with the reference model results data.