Research And Design Of GPS Receiver Baseband Processor Based On FPGA

In recent years, with the rise of smart phones and PAD, navigation and positioningbecome a necessary feature for the portable electronic device. Compared with the dedicatedGPS receiver, the GPS receiver embedded into the portable electronic device have fewercomputing resources, on the other hand with the people’s requirements of improvement to thereceiver continues to increase, more sophisticated navigation and positioning algorithm isapplied to the portable electronic device, this raise higher demands on the computingresources of the portable electronic device.In the conventional GPS receiver, the correlator in baseband processing is usuallyimplemented with hardware circuit and the tracking loop is achieve by the general processor.In order to solve the problem that the embedded GPS receiver is facing a shortage ofcomputing resources comparatively, this thesis focus on the implement of a GPS basebandprocessor on FPGA platform, correlators and tracking loops required for the GPS signalbaseband processing are integrated into a single special processor, to relieve the burden of thegeneral processor.Firstly, this thesis simulate different acquisition algothrims and tracking loops, choosethe appropriate acquisition algorithm and tracking loop for hardware implement. Thenaccording to the algorithm design circuit modules to acheive baseband processing functionssuch as automatically search for GPS satellites signal, capture, tracking.etc. At last, useModelsim as simulation tools for the simulation, and then download into FPAG platform todebug and modify, eventually finish the design and optimization of the GPS basebandprocessor.