Research And FPGA Implementation Of GPS Baseband Signal Acquisition Algorithm

Global Navigation Satellite System is a high-precision navigation positioning system,which can provide users with weather,location information,and timing applications.This system mainly includes Global Positioning System(GPS)of the United States,GLONASS of Russia(GLONASS),BeiDou Satellite Navigation System(BDS)of China and Galileo System of Europe(Galileo).Among these systems,GPS is the most widely used and mature one,and the structure and navigation principles of BDS are similar to the GPS.Therefore,the study of GPS is important for the subsequent development of the BDS.Baseband signal processing is an important part of the GPS receiver,the navigation data can be provided by baseband signal acquisition and tracking.In these processes,a lot of digital signal processing is required,so that the power consumption of it is huge.For satellite receivers,it is important to reduce computational costs while keeping the positioning accuracy,and reduce the power consumption of the baseband chip in the same time.In this paper,the positioning principle of GPS receiver is introduced firstly,and then three mature GPS signal acquisition algorithms are studied and compared.After that,a modified parallel code phase acquisition method based on average down-sampling is proposed,which includes coarse search and asymptotic code phase refined search.This method overcomes the contradiction between the accuracy and computational costs.The down-sampling operation can reduce the computational costs and the asymptotic code phase refined search ensures the accuracy of acquisition.The modified method is simulated through Matlab,and realized on FPGA platform.Compared with the traditional acquisition method,this modified method can reduce the computational costs by 25%to 67%for different down-sampling rates.The method is realized on FPGA platform when the down-sampling ratio is 16,and hardware resources are reduced.The lookup tables are reduced by 43%,the memory resources are reduced by 72%,and the digital signal processing resources are reduced by 54%.