The Design And Implement Of High-speed SSR On Spacecraft

The data recorder is one of the key equipments on aerospace, which is the basic for data retrieving, recording and processing on spacecraft. Large capacity, high-speed, low power consumption, high radiation resistant, high reliability and flexibility are still the primary research areas and goals of data recorder on spacecraft. With the development of aerospace technology, solid state recorder based on Flash Memory has been the dominating solution for the mass data storage on spacecraft.This thesis is funded by one of National863plans projects. The target of this project is to realize a hardware and software system of high-speed mass solid state recorder on spacecraft based on Flash Memory with mass capacity, high-speed, non-volatility and low power consumption. The system structure will be standardized and modularized, which can suit for various requirements.After analyzing the latest information and the development trend of international solid state recorder field. This thesis tries to design a1Tbits high-speed SSR for spacecraft with Flash Memory as the main medium and FPGA(Field Programmable Gate Array) as its control center. The bus pipelining and parallel technology and embedded system based on PowerPC for managing the bad blocks not only make the system fast and flexible but also enhance the overall performance of SSR and make the system more easier to complete. The fruit of the thesis establishes a firm foundation for the development of SSR based on Flash Memory for spacecraft and people involved large-scale space application and is very useful for reference.