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Research Of Signal Processing Platform With 3Gbps High-definition Serial Digital Interface

Posted on:2011-10-09Degree:MasterType:Thesis
Country:ChinaCandidate:Z H YuFull Text:PDF
GTID:2298330332471060Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
Nowdays, the popularity of digital TV is graduately increasing. As the provider of the information source, the digital alteration of interviewing, editing, broadcasting control and the transmission facilities are starting in all types of TV stations at all levels. Thus, the demand of digital high-definition equipment is extremely huge.In order to reduce the amount of the cable used in the device interconnection, the broadcasting level equipment often uses the serial interface to transmit informantion. For the present, the SDI(Serial Digital Interface)is the most widely used interface in studio digital TV program making systems, the standard of the SDI is changing and developing since its appearance, the format which it supports is developing step by step, from the digital SD to digital HD to 3G HD. With the update of the standard, the correlative signal processing equipments are facing the requirement of update.In this subject, using modular ideology, I designs a signal processing platform based on 3G-SDI. The signal processing flatform consists of loop output monitoring module, audio de-embeding and format switching mudule, video and audio signal delaying storage module. During the designing, serial digital video signal and T.M.D.S signal are mainly researched. On the basis of in-depth understanding of the standard of the signal interface and the indicator requirement of the equipment, the choosing of the component’s model and the designing of the general concept of the system are finished. Withal, I finish the hardware circuit diagram and the designing of the PCB. Using VerilogHDL hardware describing language, the programmable logic array component complishes the de-embeding of the digital audio signal and delaying buffer of the video and audio signal. This system flatform combines the signal loop output, de-embeding of audio signal, the video format switching and video delaying etc. The de-embeding of audio signal and the delaying buffer of the video and audio signal are complished by using FPGA. It is convinient for futuer updating, enhances the flexibility of the designing and satisfies the need of the broadcasting users. hiding theory.
Keywords/Search Tags:Digital TV, 3G-Serial Digital Interface, Field Programmable Gate Array, Audio de-embedder
PDF Full Text Request
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