Simulation And Research Of SJ LDMOS Devices

In recent years, with the growing global energy demand and the improvement ofenvironmental awareness, efficiency and energy saving products have been the new trend ofdevelopment of the market. The SJ MOSFET features many attractive electricalcharacteristics such as low on-resistance, low power consumption, The same on-resistance ofthe device area is small. With the development of semiconductor technology and the size ofthe device has been declining, the requirement of LDMOS has been increased constantly. TheSJ structure, because of its complex manufacturing technology and the substrate assisteddepletion effect, results in charge imbalance and leads to voltage dropping. In order toeliminate the substrate assisted depletion effect and relief the impact of voltage pressure bycharge unbalance, the devices also simplify the process, reduce the cost, improve the voltagerate, reduce on-resistance and meet the reasonable use of energy.The main contents of this thesis are about the breakdown voltage and the specificon-resistance of SJ LDMOS device. Furthermore, the structural parameters of each device arealso made analysis and discussion accordingly. Three device structures are researched: SJLDMOS device with step SJ (SSJ LDMOS), SOI LDMOS device with oxide bypassed (OBLDMOS) and SJ LDMOS integrated schottky contact. The contents of the research asfollows:(1) In this chapter, SJ LDMOS device with step SJ structure is researched. Thecharacteristic of this device is in the drift region, which consists of two parts of PN pillarswith complementary concentration difference. This structure makes a good inhibitory atdeviation of the concentration in SJ region. The simulation results by the Silvaco TCAD showthat, compared with the conventional SJ LDMOS device, with device dimensions in the sameconditions, by optimization of the Step SJ location and dimension, the location of Step SJ is inthe middle of the drift region, the width of the step is1.0μm, when the concentration deviatesfrom the equilibrium between±10%, the voltage decay rate of SSJ LDMOS device is lessthan the ordinary SJ LDMOS, and the specific resistance of SSJ LDMOS is decreased by34.9%.(2) In this chapter, SOI LDMOS device with oxide bypassed is researched. The characteristic of this device is the trenches which are etched in drift region, and then forfabrication simplicity in an oxide-bypassed (OB) structure, an oxide layer of predeterminedthickness together with a polycontact is used to replace the p-column of the SJ structure tomodulate the electric field. The further improved gradient OB (GOB) structure with slantedoxide sidewalls delivers a performance similar to ideal SJ devices. Therefore, the performanceof SOI LDMOS device with oxide bypassed is improved. When the devices dimensions arethe same, moreover the length and the depth of the oxide bypassed is optimized, thesimulation results by the Silvaco TCAD show that, compared with the conventional SJLDMOS device, although achieving the same voltage, the specific resistance of OB LDMOSis decreased from3.81mΩ cm~2to1.96m Ω cm~2. Meanwhile, the breakdown voltage ofGOB LDMOS device is increased by8.2%, the specific on-resistance of it is decreased from3.81mΩ cm~2to2.04mΩ cm~2.In this chapter, SJ LDMOS device integrated schottky contact is researched. The deviceintegrated schottky contact adjacent to the source, equivalent to a schottky diode in parallel.By simulated results, superior reverse recovery characteristic had been achieved, improvingthe swiching speed. The simulation results by the Silvaco TCAD also show that, comparedwith the conventional SJ LDMOS device, besides achieving the same voltage, the specificresistance has been decreased by18%. Additionally, devices are established on SOI substratewith self heating effect, with integrated schottky contact. Thermal analysis was carried out.The simulated results show that with temperature increased, due to device mobility andsaturate velocity are decreased, high temperature effect leads to threshold voltage drift andleakage current decreased.