Research On Encoding And Decoding Of Dual-binary Turbo Code And FPGA Implementation

With the advent of Turbo codes,the channel coding theory has made a great progress in approaching the Shannon limit.It is considered as the greatest technological achievement in the field of channel coding theory since the advent of trellis coded modulation technology.It has milestone significance.The excellent performance of Turbo code has attracted the attention of many scholars.In this paper,the coding and decoding algorithm of Duo-Binary Turbo code is studied and improved,and a Duo-Binary Turbo decoder is implemented on the FPGA platform.First,the encoder structure of the Duo-Binary Turbo code is introduced from four aspects:the component encoder,interleaver,puncturing and channel interleaver.And how to get the cyclic state of the encoder is introduced.Then,we introduce three component decoding algorithms for Turbo code.The performance and complexity of the three decoding algorithms are analyzed by computer simulation,and the performance of two estimation methods of cyclic state is simulated and compared.On this basis,a decoding method of Turbo codes based on pre-decoding is proposed.Under the same simulation conditions,this method has a lower frame error rate than the traditional decoding method.On this basis,a method to improve the decoding performance and a method to improve the anti-jamming performance are proposed.Finally,the principles and methods of decoder parameter selection are given from three aspects,including source information packet length,iteration number and code rate.On the FPGA platform,a Duo-Binary Turbo code decoder which suppoerts Multibit rate is designed and implemented.The decoder uses Turbo decoding method based on pre-decoding,and the branch metric matrix is generated by adaptive way.Without increasing the decoding complexity,the decoder has lower frame error rate and stronger anti-jamming performance.