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The Research Of SOS Design For RFID Card

Posted on:2013-10-01Degree:MasterType:Thesis
Country:ChinaCandidate:Z H LiuFull Text:PDF
GTID:2248330374981464Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
All we know that the development of the integrated circuits has followed a Moore’s law,that is the number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every18months,the integrated circuit’performance doubles too.With the increasing of the transistors’number on a chip,cpu’performance grows quickly,it runs faster and faster.The dimension of the transistor comes smaller and smaller means that we can integrate more and more transistors on a chip which means we can buy a cpu in a higher performance using the same money.So the price decreases.In the past decades, The design complexity of the RFID card grows fast. The development of the design methodology and process makes the integrated circuit industry forwards ahead everyday.Recently,the VDSM process and the reuse of intellectual property cause an unprecedented change of the SOC design in integrated circuit industry.As time goes by,the SOC design technique will improves Continuously.How will we realize a hige performace,stable,low power SOC in the new challenges is a difficult problem that we faces.The article firstly introduced the history and the recent situation of the chip design methodology, and then introduced the design method based on the IP reusing techniques.Based on these,the article introduced the SOC chip structure of this design,and every module in the design.At the same time,the article introduced every module’s function and its realization.Besides we selected the appropriate CPU, the appropriate memory modules and the appropriate reusable IP modules to speed up the progress of this design, we use the modular design methodology which makes the IP reuse technique in the design easier.This paper introduces the the RFID card’s subject source,It also introduces the SOC architecture, and the total flow of the chip design.The flow of this design is:spec ification,RTL coding,simulation,Synthsis,DFT,Place&Route.In the design,we use the top-down design process that is recommanded by Synopsys.We also use a lot of Synopsys’methodology.Besides we have used some synopsys’ design tools,such as LEDA,VCS,Design Compiler,IC Compiler,PrimeTime etc.The article was based on the writer’s design on RFID card.In the design,the writer sloved some problems such as:data read/write on none I2C bus EEPROM,cross-clock-domain problem and meteastibility in asynchronous fifo etc.
Keywords/Search Tags:SOC, RFID card, ASIC design, EDA
PDF Full Text Request
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