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Design And Implementation Of MIFARE1Compatible CPU Card Asic Chip

Posted on:2015-07-03Degree:MasterType:Thesis
Country:ChinaCandidate:X W WuFull Text:PDF
GTID:2298330452953214Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
As a kind of consumer products that can store and process data, IC card has beenwidely used within finance, telecommunication and medical care. The CPU card, onekind of IC card, has occupied more and more market share since it is easy to extendand high security. The CPU card will gradually take the place of Mifare1card in lotsof occasion, especially when the security algorithm of Mifare1card has been cracked.But the large number and the advantage of Mifare1card make it difficult to forbiddenthe use of Mifare1card in the short term.The research takes part in the design of Mifare1card and CPU card functioncompatible chip, and realizes the digital logic design. The chip can work as M1cardor CPU card, according to the communication commands. The analog module andcommunication interface are multiplexing by making use of the same communicationmode between M1card and CPU card. The hardware encryption and decryptionmodule is used to meet the timing requirement of M1card. The use of hardwareimplements the digital link layer of CPU card. The design also provides the firmwareand the interface between hardware and software to support the two modes.The research is based on the contactless IC card standard ISO/IEC14443and theM1card technical specifications. By testing and analysising the CPU card that theLab developed dependently and the general M1card, the scheme that the software isused to simulate the function of M1card was put forward. Aiming at the deficiency ofpure software implementation scheme, the feasibility of realizing M1card functionbased on CPU card is analyzed. After that, the collaborative software and hardwarescheme is used. The scheme synchronizes the encryption and decryption with the datacoding and decoding to shorten the transaction time. This study also analyzes the CPUcard chip hardware structure and COS structure, separates the application layer anddata link layer function in COS and implements the data link layer with hardwarelogic.When the RTL design is finished, the software simulation is used to verify thefunction, the timing and the power consumption of the design. Also the FPGAplatform is used to simulate an actual chip to test the transaction with the readers forMifare1card and the readers for CPU card, which will verify that the chip achievesthe complete functions of Mifare1card and CPU card. With the help of the testingtool, MP300TCL2, the chip can get a complete verification according to the test casesfrom ISO/IEC10373-6protocol. The testing has met the expected requirements; thechip has been taped out in SMIC0.18μm EFLASH process.The design not only reduces the chip cost, but also makes the chip more widelyused. The design achieves a multi-purpose card as well; the separation from the application layer and the data link layer makes the hierarchy and the development ofthe COS simplified.The result of this study is original and practical in aspect of the multi-purposecard, and is able to effectively promote the transition from Mifare1card to CPU card.Also it has a very good reference for SOC system design, simulation and FPGAverification.
Keywords/Search Tags:CPU card, Mifare1card, compatible, block transmission
PDF Full Text Request
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