Qpsk Demodulation Algorithm Of Broadband If Digital Based-on Fpga Design And Implementation

The design of the target is to complete the design of a meteorological satellite demodulator, this demodulator FPGA-based all-digital system.This paper studies include the common technique of the basic principles of the QPSK demodulator, digital receivers, combined with the existing synchronous demodulation algorithm and FPGA hardware features, a new hardware demodulation structure, eliminating the need for most of the multiplication the device consumption, saving more hardware resources, thereby increasing the speed of data processing, and is conducive to the practical application.This paper mainly includes a few aspects:(1) Wide variety of demodulation algorithm model, a system model of the communication system demodulation program, conducted in-depth theoretical analysis, verified the feasibility of the system;(2) According to the proposal put forward by various parts of the QPSK demodulation algorithm using Matlab simulation to complete the functional verification of the system, and the output bit error rate simulation;(3) Demodulation algorithm to the FPGA platform verification, through the preparation of the hardware VHDL language, to build the hardware platform of the minimum resource consumption, and crawl through the included ChipScope various parts of the simulated signal, verify the correctness of its functional and timing;(4) FPGA chip as the core, and build the hardware platform, completed the final commissioning of the core part of the carrier synchronization and symbol synchronization. Under the symbol rate5Mbps, the modulation signal8dB, the error rate is lower than0.0005to achieve the desired requirements, to meet the needs of the actual communication.