Tdd Communication System Of The Baseband Signal Engineering Implementation

Digital communications system has been used widely in many fields, and also they are in constant improvement techniques to move forward. The receiving end is expected to detect the best sample moment to judge the right signals, thereby reducing the error rate in digital communication systems.This thesis aimed to achieve a sampling rate of240MHz’s TDD communication system to send and receive signals. For the project requirements and cost considerations, we use the low-cost Xilinx FPGA chip to implement the system. In the hardware the implementation process will be subjected to speed limits, so we use the pipelining technique in many of the algorithm to improve the speed as to meet the system requirement.In the digital communications, synchronization is a key technology. It’s need a good synchronization if you want the system work normally and high efficiently, because the synchronization technology affect the communication quality directly. The synchronization technology is very important, which include carrier synchronization, frame synchronization and bit synchronization, and the bit synchronization is the basic synchronization, if you want to get right sample and judgment, the bit synchronization must be correct, so that you can restoration the correct data. In this paper, we used Gardner bit synchronization to meet the requirement, it passed Simulink mode simulation and System generator mode simulation and implemented on FPGA.In digital communication, there maybe phase ambiguity or long even code in signal, therefore, in order to eliminate them, getting better information of bit synchronization and bit rollover, this can be through the differential encoding and line code to solve. Differential encoding can be good to eliminate the phase ambiguity, and the line code transform can balance the difference of bit code, avoiding appears long even code. The mBnB line code is often used in digital communication to reduce the even code and increase bit synchronization information, and it can inspect simple bit error code.