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Study On Synchronization Technique In High Speed Data Link And Its FPGA Realization

Posted on:2012-07-20Degree:MasterType:Thesis
Country:ChinaCandidate:Z Q JieFull Text:PDF
GTID:2178330338997694Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
COFDM(Coded Orthogonal Frequency Division Multiplexing) system,which combines OFDM with codec, has already become a research hotspot as the key technology in future radio communication systems. It not only has advantages of OFDM, such as high bandwidth efficiency, good performance in anti multi-path fading and narrow-band interference suppression, but also has high coding gain of codec. However, COFDM is very sensitive to frequency offset, timing error and phase noise, a tiny synchronization offset may lead to the deterioration of the BER (Bit Error Rate) performance of system, the hardware realization of hign gain codec is also complex. Therefore the performance of synchronization and codec exerts a direct influence on data transmission in COFDM system.The development history and research actuality of COFDM technology have been reviewed in this dissertation. The basic principle of OFDM technology, distinguishing feature and technique preponderance are also expatiated in detail. On the backgroud of the aviation downstream data link project, a complete COFDM physical layer scheme is presented. A detailed theoretical analysis and simulation are employed to discuss the effect of all kinds of synchronization error on COFDM system. Simulations are also used to make a detailed analysis and comparison of the estimation performance of synchronization algorithms. Several kinds of decoding algorithms are deduced in detail and campared through simulations, one proper decoding algorithm is choosed for decoder realization.According to the system parameters, a complete COFDM system sutrcture including synchronization and codec is developed on the basis of full consideration to the performance of algorithms and realization complexity. The realization structure of the various synchronization algorithms are described in detail, a pilot based joint estimation and compensation method of residual phase error and channel frequency response is designed to ensure the estimation performance while significantly reduce the complexity of the system design. As the iterative process of Tubo decoder is complex and demands too many memories, a new memeory scheduling method is proposed, and this new decoding structure saves half of memories to traditional decoding structure.The circuit logic of COFDM baseband transceiver is described by verilog HDL and verified by MODELSIM simulation tool. A realization method of IF digital receiver is proposed, and the hardware platform of COFDM IF transceiver is designed. Finally, this dissertation combines the hardware platform with the circuit logic and makes a prototype of COFDM system, this prototype is tested in lab environment, and the test results of some key circuit are presented. The test results indicate that the COFDM system can meet the practical requirements.
Keywords/Search Tags:COFDM, Synchronization, Turbo Code, FPGA
PDF Full Text Request
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