Based On Nios Ⅱ Image Recognition System Design

This thesis design a Nios Ⅱ-based image recognition systems, image recognition systems are generally only on the PC, as an attempt and innovation, we will be ported it to the FPGA development board to achieve. The design uses Terasic FPGA development board--E2-70, the D5M camera module, the LTM display module devices, Altera’s Nios Ⅱ embedded soft core processor and SOPC platform development environment, design a simple image recognition system. This system through the selection of field programmable gate arrays (FPGA), application of the Verilog language, controls the CMOS camera, and make the images collected in the FPGA development board deal with an image processing module for preliminary processing and conversion, then stores the image data in SDRAM. Nios Ⅱ soft core processor, added to the system by designing a data acquisition module reads the data in the SDRAM, will receive the image data with the original sample image data processing algorithm after PCA (Principal Component Analysis), and finally with a minimum distance comparison method to determine the similarity between the image and thereby achieve the function of the hardware and software co identifiable image.