Research Of Fault Tolerance For Handling Transient Faults In Network On Chip

As technology scales toward deep submicron, transient faults have been paid more and moreattention as interferences which result in transient faults are the main source of faults in NoC. Faulttolerance is an effective method to deal with the problems of transient faults in NoC. The subject ofthis paper is to design a kind of fault tolerance based on double-buffer and XYX routing, and thendesign and realize a fault tolerant router based on request-retransmit, as a result, it will achieve thepurpose of optimization on delay and power consumption.Firstly, we analyze the exiting research and development status of fault tolerant algorithms ontransient faults at home and abroad, and then we analyze and compare the performance of someexiting request-retransmit algorithms theoretically by time-delayed and power-consumption models,which shows us that reduction of the time on waiting for acknowledge packets will help reduce thelatency, it also shows us that reduction of the redundancy packets will help reduce the powerconsumption. Based on theoretical analysis and the random routing algorithm by end-to-end, a kind offault tolerance based on double-buffer and XYX routing is presented, this paper researches an errordetection and retransmission mechanism which is based on double buffer and XYX routing. For theoptimization of the delay and power consumption, the mechanism takes XYX routing instead ofrandom routing to reduce the number of redundancy packet, and takes the double buffer mechanism toreduce waiting time of the packet.In order to verify the effectiveness of the mechanism, the paper first designs the system levelmodel of fault-tolerant router which is based on error detection and retransmission. And furtherrealizes the RTL level model of fault-tolerant router based on the Synopsys EDA platform. Accordingto the model, the paper constructs a4×42D-Mesh network, and presents performance cost analysisof the mechanism.